`timescale 1ns / 1ps module ycalc(CLK, EN, Y, DY, MY, TY, ENB, ADDR); input CLK; input EN; input [9:0] Y; input [9:0] DY; input [1:0] MY; input TY; output ENB; output [3:0] ADDR; reg enb_reg; reg [3:0] addr_reg; assign ENB = enb_reg; assign ADDR[3:0] = addr_reg[3:0]; parameter H_ACTIVE_PIXEL_LIMIT = 10'd640; parameter V_ACTIVE_LINE_LIMIT = 10'd480; always @(posedge CLK) begin if ((EN == 1'b1) && (Y < V_ACTIVE_LINE_LIMIT) && ((TY == 1'b1) || ((Y >= DY) && (((Y - DY) >> MY) < 16)))) begin enb_reg <= 1'b1; addr_reg[3:0] <= (Y - DY) >> MY; end else begin enb_reg <= 1'b0; addr_reg[3:0] <= 4'b1111; end end endmodule